1. Field of the Invention
The invention relates in general to a device package, and more particularly to a semiconductor device package.
2. Description of the Related Art
At present, semiconductor industry has being developing and satisfying the requirement of the market. The structure of any semiconductor device demands precision and miniaturization when it comes to functionality of the semiconductor device. However, under some circumstances, the yield and quality of the semiconductor device is still difficult to control.
For example, integrated circuits (IC) packages have become more compact and require increased functions to be incorporated together. The increased logic functions on an IC package means an increase in circuit density of the IC package. As circuit density increases on the IC package, it becomes important to provide a reliable and robust packaging for forming the IC package. Also, the mechanical and electrical properties of such IC package need to be carefully considered without affecting the overall performance of the IC package.
Typically, the structure of any IC package or other semiconductor device package may be damaged due to, for example, cracks in the chips of the package when the chips are subjected to stress in the assembly process for the chips may be stressed when being directly moved by the suction nozzle to be coupled to other components.
Additionally, after assembling the chips, the structure of the IC package may be weakened due to invisible flaws on the chips and hence renders the IC package more susceptible to damages. Besides, damages on the chips adversely affect the integrity of the IC package, failing the test of the IC package. It is therefore desirable to provide a solution to address at least one of the foregoing problems of the conventional operations.